Specific On-Resistance Reduction for the LDMOS Using Separated Composite Dielectric Trenches

In this article, a novel lateral double-diffused metal oxide semiconductor (LDMOS) with separated composite dielectric trenches (SCDT LDMOS) is proposed. The main features of SCDT LDMOS are that the depths of gate trench and lateral separated trenches in the drift region are the same, and the high-
${k}$
dielectric is deposited into each trench in one process. The gate trench is filled with high-
${k}$
gate dielectric and metal, which forms the vertical high-
${k}$
metal gate (HKMG) structure, and the lateral separated trenches filled with high-
${k}$
dielectric and SiO2 form the composite dielectric trenches. The composite dielectric trenches assist in the depletion of the drift region, which improves the drift doping concentration and reduces the specific ON-resistance (
${R} _{{ \text {on,sp}}}$
). Meanwhile, the vertical HKMG structure effectively reduces
${R} _{{ \text {on,sp}}}$
and threshold voltage (
${V} _{\text {TH}}$
). The simulation results show that the SCDT LDMOS with the HK dielectric thickness of 300 nm and the permittivity of 250 has reduced
${R} _{{ \text {on,sp}}}$
by 45.7%, increased the figure of merit (FOM) by 83.5%, and reduced
${V} _{\text {TH}}$
from 2 to 0.83 V when compared with the conventional LDMOS. The feasible process is designed and simulated, and the key experiment of the HK deposition process is carried out to verify the feasibility of the SCDT LDMOS.