Analysis and Optimization of Sidewall Roughness on Microwave Performance of Through-Glass Vias in 3-D Integrated Circuits

The integrity and reliability of signal transmission in glass 3-D integrated circuits (ICs) can be improved by studying the effect of sidewall roughness of through-glass vias (TGVs) on microwave performance. Thus, in this study, the effect of different sidewall roughness of TGVs on the electrical characteristics, such as loss, delay, and impedance correction factors, are analyzed by extracting S-parameters from the CPW-TGVs-CPW model. An accurate RLGC electrical model of TGVs that considers sidewall roughness is proposed. The correction factor of inductance is verified and found to be greater than that of resistance through simulation, physical measurements, and microscopic characterization analysis. Meanwhile, the sidewall roughness was improved by controlling the laser-induced wet etching (LIWE) process of TGVs. It was greatly reduced from
$1.257 \mu \text{m}$
to 25 nm. The proposed electrical model is accurately verified below 40 GHz by extracting the electrical parameters of TGVs with different sidewall roughness.