Dual-Band 802.11ax Transceiver Design With 1024-QAM and 160-MHz CBW Support

A
$2\times 2\,\,802.11$
ax transceiver design is presented to support dual-band simultaneous operation (DBS) and 1024-QAM modulation. The proposed architecture features linearity enhancement for uplink orthogonal frequency division multiple access (OFDMA) and wideband transmission. With integrated low-phase noise clock generation and phase locked loop (PLL), best-in-class receiving sensitivity and lowest transmission EVM floor are demonstrated through measurements. With 20-MHz (HE20) receiving, −96.5/−66 dBm sensitivity level is measured for MSC0/11, respectively. The output power reaches 18 dBm with −35-dB EVM for 80 MHz 1024-QAM (HE80 MCS11) transmission at 5-GHz band. Narrowband OFDMA signals can be transmitted at full power capacity, and 160-MHz channel bandwidth (CBW) can also be supported without digital predistortion (DPD). The fully integrated transceiver occupies 10.5-mm2 silicon area in 22-nm CMOS.