An Artificial Neural Network Implemented Using Parallel Dual-Gate Thin-Film Transistors

Implementing in-memory computation, an artificial neural network (ANN) consisting of thin-film transistors (TFTs) monolithically integrated in each unit of an array of capacitors is constructed. Both single-gate and parallel, dual-gate (DG) TFTs are deployed. The capacitors and the DG TFTs serve as the respective memory and computational elements. The DG TFT offers the capability of amplifying a weak but relevant input signal and suppressing a strong but irrelevant input signal across a synaptic gap, and the storage of charge on the capacitor is pseudostatic because of the exceptionally low OFF-state leakage current of the accompanying address TFT built on a metal–oxide semiconductor. The feasibility of such an ANN is demonstrated using a
$4\times6$
array for classifying a specific set of Tetris patterns.