Symbolic simulation heuristics for high-level design descriptions with uninterpreted functions

This paper handles symbolic simulation for high-level design descriptions including uninterpreted functions. Two new heuristics are introduced, which are named "symbolic function table" and "synchronization". In the experiment, the equivalence of a hardware/software codesign was checked up to a given finite number of cycles, which is composed of a behavioral design, that is, a small DSP program written in C, and its register-transfer-level implementation, a VLIW architecture with an assembly program. Our prototype symbolic simulator succeeded in checking the equivalence of the two descriptions which were not tractable without the heuristics, up to tens of thousands of cycles.