Design of CMOS Device Process Sensor in 28 nm FD-SOI with 2 % of Frequency Spread

The paper presents a ring oscillator based approach to sense device process variations. The fabrication for a large number of chips generally lacks with consistent performance, and hence, the specifications needs to be measured to assure design for yield (DFY). The proposed research determines the output frequency of an oscillator to sense the process variation either for an nMOS or for a pMOS device. The proposed method has been designed and implemented in a CMOS 28 nm FD-SOI (fully depleted silicon-on-insulator) technology. The designed circuit has been simulated with the supply voltage of 0.8–1.15 V at different process and temperature corners for the used technology. The proposed additional sensor circuitry reduces the guard bands for the digital circuit without losing the functional-reliability. The simulation results achieve average variations below 5 % for the case of an opposite device, and exhibits frequency local spread of less than 2 %.