A 1.68-23.2 Gb/s Reference-Less Half-Rate Receiver with an ISI-Tolerant Unlimited Range Frequency Detector

The data rates of high speed serial link keep increasing in the past decades. To accommodate multi-standard and legacy mode operation, there is a need for a high speed receiver providing wide range and continuous rate operation, which is difficult to achieve. Limited by the frequency capture range of the CDR, an auxiliary frequency locked loop (FLL) is commonly used for a broad band operation. An FLL with a reference/crystal input is a common approach for a reliable operation. To provide the merits of low cost and small form factor for system integration, reference-less CDRs have drawn the attention of many researchers recently [1]–[5]. There are two conventional approaches to accomplish reference-less CDRs. One is based on a modified quadri-correlator architecture, which tries to detect the fast/slow frequency offset based on the sampling phase rotation [2][3], and blocks the inefficacious indicators when the sampling phases cross two quadrants. Under ISI channels where the data edge is smeared out, frequency detection based on sampling phase rotation becomes unreliable if the data edge is not properly equalized. Another approach to reference-less frequency detectors uses stochastic divider or fast/slow histograms to detect frequency offset[1][5]. A posteriori knowledge of the data pattern, transition density, and channel characteristics are required to properly setup the threshold and weighting coefficients of the frequency detectors. To overcome the aforementioned shortcomings and design challenges, this paper presents a pulse-width based frequency detector, which provides unlimited range frequency detection. To the author’s best knowledge, the proposed high speed receiver, which consists of CTLE, DFE, and CDR, demonstrates the broadest operation range (13.8X) as are reported to date.