Oxidation-resistant amorphous TaN barrier for MIM-Ta/sub 2/O/sub 5/ capacitors in giga-bit DRAMs

We demonstrate that an amorphous TaN layer with no grain boundaries shows a good oxidation-resistant performance after forming and annealing the Ta/sub 2/O/sub 5/ dielectric of MIM capacitors for DRAM applications at 550/spl deg/C in O/sub 2/ ambient. We fabricated an MIM-Ta/sub 2/O/sub 5/ capacitor with a concave-type Ru storage node on the TaN barrier metal. This showed a contact resistivity of 0.27 k/spl Omega//spl middot//spl mu/m/sup 2/, a capacitance of 20 fF/bit, and a leakage current of 0.9 fA/bit (-1 to 1 V). We further fabricated a crown-type Ru electrode to demonstrate scalability to 0.10 /spl mu/m design rules.