Improvement of p/sup +/ contact resistance through optimal boron distribution TiSi/sub 2//P/sup +/ interface for 0.18 /spl mu/m DRAM technology and beyond

Boron concentration was investigated at the TiSi/sub 2//p/sup +/ interface which was one of the important factors to influence on the p/sup +/ contact resistance, for 0.18 /spl mu/m DRAM (Dynamic Random Access Memory) technology and beyond. During the formation of titanium silicide (TiSi/sub 2/) on the p/sup +/ area, heavily doped boron junction is consumed as the silicide moves into silicon. In this paper, we obtained excellent improvement of p/sup +/ contact resistance employing the method of maximizing boron distribution at TiSi/sub 2//p/sup +/ interface, using BF/sub 2/ as an implanting species. In addition, we noticed that the factors contributed to the p/sup +/ contact resistance greatly were as-deposited Ti thickness on the p/sup +/ layer, Ti/TiN annealing temperature and BF/sub 2/ ion implant energy. Furthermore, we observed that fluorine influenced the interface boron concentration significantly by piling up in the defect region of the BF/sub 2/ implanted layer. Thus, we propose that, in the case of less than 1200 /spl Aring/-p junction, the Ti thickness should be controlled less than 50 /spl Aring/ on the bottom of p/sup +/ contact hole and the Ti/TiN annealing temperature should be optimized at around 750/spl deg/C in order to maximize the boron concentration at the TiSi/sub 2//p/sup +/ interface.