A pipelined 13-bit 250-ks/s 5-V analog-to-digital converter

A pipelined, 13-bit, 250-ksample/s (ks/s), 5-V, analog-to-digital (A/D) converter has been designed and fabricated in a 3- mu m, CMOS technology. Monotonicity is achieved using a reference-feedforward correction technique instead of (self-) calibration of trimming to minimize the overall cost. The prototype converter requires 3400 mil/sup 2/, and consumes 15 mW.<
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