Latency Analysis in Kernel Based Packet Switching in Multi-core System

A Network function virtualization (NFV) concept has started to take place in commercial telecom networks over the last years and virtual switches are considered as being their integral component. Despite various acceleration technologies developed at this time that is boosting software packet processing performance, the packet processing in kernel is still considered the most flexible solution. Work [1] proposed kernel virtual switching performance evaluation methodology based on the execution area (EA) distribution by CPU core pinning. Presented EAs are built from whitebox analysis of the packet processing in the kernel. Research focused on throughput performance in relation to the number of interrupts and interrupt coalescing times. This work comes as a natural progression of research from work [1], analysing the latency aspect of the affected methodology in relation to previously presented results.