High-Resolution PPM for Time-Based Architectures

This paper presents a new high-resolution pulse-position modulator (HR-PPM) circuit based on two different designs. The proposed high-resolution PPM is presented for time-based serial communication links. The proposed HR-PPM has been combined with a lower-resolution PPM to achieve a dual-resolution PPM (DRPPM) circuit for time-based serial link communications. An example of 2-bit 2Gbps high-resolution PPM and 4-bit 4Gbps DRPPM incorporating the high-resolution PPM are simulated in 65nm CMOS. The proposed HR-PPM and the DRPPM consume less than 50μW and 250μW respectively. An implementation of the proposed DRPPM has been realized on a PCB board in order to generate a 4-bit 2 Gbps DRPPM transmitted signal. The measured eye diagrams are presented. Using the DRPPM circuit in time-based serial links increases the total number of modulated bits and hence increases the link rate. It also reduces the number of bits of the required time-to-digital converter (TDC) circuits that are used at the receiver side.