Channel Engineering of Normally-OFF AlGaN/GaN MOS-HEMTs by Atomic Layer Etching and High- $\kappa$ Dielectric

In this letter, normally-OFF AlGaN/GaN metal- oxide-semiconductor high-electron-mobility transistors with a threshold voltage of 2.2 V have been achieved by an atomic layer etching technique. Combined with surface passivation by atomic layer deposition of composite HfSiO high-κ gate dielectric, a well-controlled gate-recess process with minimized surface damage results in improved interface properties with a low interface trap density of 2.8 x 10
¹¹
eV
^-1
cm
^-2
and suppressed gate leakage current with a high current on/off ratio over 1011. A maximum current density of 518 mA/mm with an ON-resistance of 10.1 Ω · mm and a high breakdown voltage of 1456 V at an OFF-state current density of 1 μA/mm are also achieved. In the meantime, the dynamic Ron is only 1.2 times the static Ron after OFF-state drain voltage stress of 120 V and 2.6 times after 300-V stress.