Time-resolved single-photon detectors: Integration challenges in CMOS technologies

Single-photon avalanche diodes (SPAD) are increasingly being used in a number of applications where the timing information carried by the captured light is crucial. In this paper we will analyze which challenges need to be addressed in order to integrate SPAD devices into a CMOS system-on-chip. The analysis will span three levels of abstraction, from the device integration in CMOS technology, to the implementation of time-resolved arrayed electronics, to the architectural level design. A perspective on future developments, involving use of advanced technologies such as 3D stacking, is given.