Gain-Cell Embedded DRAM-Based Physical Unclonable Function

Physical unclonable functions (PUFs) are important elements in hardware-secured systems as they can generate chip identification and encryption keys based on random variables of the manufacturing process. Many previously proposed PUF implementations are based on SRAM memory technology, since it is embedded on-chip and can provide such randomness. Logic-compatible gain-cell embedded DRAM (GC-eDRAM) is a low density, low leakage alternative to traditional SRAM for the implementation of embedded memories that also provide an additional mechanism of randomness by means of the data retention time (DRT) of the bitcells. In this paper, we propose using the DRT of GC-eDRAM arrays as a source for the generation of an intrinsic PUF. We provide an in-depth analysis of the leakage mechanism of GC-eDRAM and demonstrate how it determines the DRT of the bitcell. Based on this analysis, we provide an authentication methodology for enrollment and evaluation of a GC-eDRAM based PUF. Monte Carlo simulations on a 1 kbit array in 28 nm technology demonstrate the high uniqueness of the PUF with an inter-die Hamming distance of 50%. Reliability analysis under a wide voltage range (0.4 V-1 V) and temperature (0 (0 °C-85 °C) variation demonstrate the statistical robustness of the proposed PUF less than a 6% error-rate.