On the Second-Harmonic Null in Design Space of Power Amplifiers

This letter investigates the source of performance degradation and efficiency null that is traditionally observed during second-harmonic load pull of active power transistors. A theory that explains the performance degradation is presented, resulting in a simplified closed-form equation that predicts the location of performance null for different device peripheries and/or design frequencies. Thereafter, the intrinsic drain waveforms for null and maximum efficiency are analyzed to study potential causes for efficiency degradation. The theory is validated using active load-pull measurements of laterally diffused metal-oxide-semiconductor and gallium nitride active devices for different peripheries (0.5-4.8 mm) at various frequencies of operation (2, 2.6, and 3.5 GHz).