Characterization of 880 V Normally Off GaN MOSHEMT on Silicon Substrate Fabricated With a Plasma-Free, Self-Terminated Gate Recess Process

In this paper, we report the device performance of a high-voltage enhancement-mode (E-mode) GaN MOSHEMT on silicon substrate. Normally off operation is realized by a self-terminated precision gate recess process on an optimized high-electron mobility transistor structure. The GaN MOSHEMT is fully pinched off at zero gate bias, suggesting a “true” normally off operation. The threshold voltage is 0.4 V with a drain current density of 1
$\mu \text{A}$
/mm as the criteria. The device with 15-
$\mu \text{m}$
gate-drain distance and 100-
$\mu \text{m}$
gate width exhibits a maximum drain current of 356 mA/mm at 8-V gate bias. The on/off current ratio of the device is larger than 10
¹⁰
with a subthreshold slope of 80 mV/dec. The gate leakage current is below 10
⁻⁷
mA/mm up to 9-V gate bias. The off-state breakdown voltage (BV) is as high as 1528 V (880 V) measured with floating (grounded) silicon substrate at a drain leakage current criterion of 5
$\mu \text{A}$
/mm. The specific on-resistance (
${R}_{\text {ON,SP}}$
) of the device is 2.79
$\text{m}\Omega \cdot$
cm
²
, and the power figure of merit (BV
²
/
${R}_{ \text {ON,SP}}$
) is 277 MW/cm
²
. High-voltage pulsed I–V measurement indicates that the dynamic on-resistance is only 1.6 times the static one with a pulsewidth of 10
$\mu \text{s}$
at 400-V off-state quiescent drain bias. The high performance of the normally off GaN MOSHEMT is supposed to benefit from the high quality low pressure chemical vapor deposition Si
₃
N
₄
passivation layer and the advanced E-mode device fabrication process.