A VLSI On-Chip Analog High-Order Low-Pass Filter Performance Evaluation Strategy

This paper presents a strategy for evaluation of an analog high-order low-pass filter. In the proposed strategy, the evaluation procedure is divided into three modes, first, to estimate the passband characteristic, second, to estimate the stopband characteristic, and finally, to evaluate the performance of the analog filter by the analysis of the relationship between the attenuations at the passband and stopband. The proposed strategy is investigated to quantify the tradeoffs between the evaluation accuracy and hardware cost, estimate the probability of having a specification-passed device, and estimate the evaluation time. The evaluated result is related to a “ratio” rather than a “specific value.” This is an interesting and advantageous feature of the proposed strategy. Hardware reusability makes the proposed strategy practicable and possible. The experimental verification of the proposed strategy demonstrates the functionality, effectiveness, and feasibility of the proposed strategy.