Operation of the Classical CMOS Schmitt Trigger As an Ultra-Low-Voltage Amplifier

In this brief, we analyze the operation of the classical Schmitt trigger (ST) circuit as an ultra-low-voltage (ULV) amplifier. Small-signal analysis is employed in order to determine optimum relative transistor sizes, which maximize the voltage gain. A comparison of the classical ST with the standard inverter highlights the relative benefits and drawbacks of each for operation as an amplifier in ULV applications. It is shown that the theoretical minimum supply voltage of the ST for voltage amplification (absolute voltage gain ≥ 1) is 31.5 mV at 300 K, which is below the well-known 36 mV limit of the standard inverter. Two test chips in a 180 nm technology with ST circuits built from transistors with different relative sizes were fabricated. For V
_DD
= 60 mV and 100 mV, the values measured for the voltage gain of the ST were 6 and 32 dB, respectively, which are significantly higher than the values of 4.4 and 15 dB simulated for the standard inverter at the same supply voltages.