Design of network force balanced accelerometer

A network force balanced accelerometer (NFBA) with multiple interfaces was designed in this paper. One integrated and orthogonal three-component mechanical base was used in the NFBA. One record circuit with high precision analog-to-digital convertors and low-power ARM STM32F407 was embedded in the force balanced accelerometer. The record circuit was used to do high precision and high speed analog-to-digital conversion, data management and communication. In the record circuit, one group of logic signals drives three ADS1282. That synchronously generates three channel 32 bit resolution digital vibration data. ARM STM32F407 with a 4-core 1.4G*4 CPU and multiple interfaces was selected to manage clocks, process data, communicating. Five types of linearity power supply chip were selected to design high-precision powers in the NFBA. Every type of power supply was isolated designed. Each channel's power supply was independently designed. Then the effective resolution of analog-to-digital conversion can achieve 26 bit in the record circuit. The NFBA designed in this paper has many good specifications, low cross sensitivity in full bandwidth, low power consumption, low volume, 26 bit effective resolution. It supports 1000Hz sample rate, serial interface, cable network and so on.