Reduction of clock jitter effect in 1-bit CT delta-sigma modulators by correlated clocks

A new technique to reduce the clock jitter effect on single-bit continuous-time delta-sigma modulators (CTDSM) is proposed. It utilizes a delay line to generate N highly correlated clock sources to reconstruct the feedback waveform. Theoretical analysis show that the jitter-induced random noise power is reduced by a factor of 1/N
²
. Simulation results confirming the analysis are reported.