An innovative modelization of loss mechanism in silicon integrated inductors

In this paper, we present an improved lumped-element equivalent circuit of silicon integrated inductors, which accurately takes into account parasitic effects and separately models the effect of metal and substrate losses. We describe an efficient procedure to deduce all the elements of the equivalent circuit from wideband, two-port measurements of the S-parameters of the inductor. The separate characterization of metal and substrate losses allows us to evaluate separately their contribution to the inductor's Q-factor. We also report the results of the characterization of some CMOS and BiCMOS integrated inductors designed to be included in radio frequency integrated circuits operating at 1.8 GHz.