Architecture for complex network measures of brain connectivity

Cognitive and motor disorders are growing socio-economic concerns where drug treatments although being the first line of action, are not always effective in restoring cognitive and motor functionality. Research has shown that functional brain connectivity, signifying information exchange among different brain regions, is correlated with efficient execution of cognitive and motor tasks. Hence, to analyze the connectivity parameters in real-time for automated disease prognosis and control, an optimized accelerator/hardware design is required which can be integrated within the sensing device. Here we have designed and implemented an optimized hardware architecture of the graph theoretic parameters (computed concurrently) for the clinically significant functional connectivity measure (Phase Lag Index) of human brain network. To the best of our knowledge, this is a first study on the implementation of the complex network topology parameters of brain connectivity measure which has been synthesized at 25 Mhz, using STMicroelectronics 130-nm technology library and having a dynamic power consumption of 10 nW, making it amenable for real-time high speed operations.