Wideband Inductorless Low-Power LNAs with Gm Enhancement and Noise-Cancellation

Two inductorless low-power differential low-noise amplifiers (LNAs) are designed for multiband wireless communication applications. Both LNAs are based on the combination of common-gate (CG) and shunt feedback topologies. In the first LNA, the cross-coupled push-pull structure with separated bias for nMOS and pMOS CG transistors is utilized to realize gm enhancement, partial noise cancellation, and bandwidth extension. In the second LNA, cascode transistors are utilized on the basis of the first topology to alleviate the Miller effect and to construct current steering structures, so as to extend the bandwidth. For both LNAs, in-depth analysis is given, and methods for sizing and biasing optimization under power constraint are proposed to obtain good overall performance tradeoffs while maintaining low-power consumption. The prototypes are implemented in 65-nm low-power CMOS technology. The first LNA achieves a gain of 21.2 dB, a noise figure (NF) of 3-3.5 dB over the 3-dB bandwidth of 200 MHz to 2.7 GHz and an IIP3 of -2 dBm at 1.1 GHz. It consumes 0.96 mW from 1.2-V supply. The second LNA exhibits a gain of 21.2 dB, an NF of 2.8-4 dB over the 3-dB bandwidth of 100 MHz to 4.3 GHz. It consumes 2 mW from 1.2-V supply. Each LNA occupies an area of 0.05 mm
²
.