A novel ripple borrow subtractor cell design using asynchronous methodology

In this paper, we propose a novel design approach for Ripple Borrow Subtractor (RBS) to attain better energy and delay. At present portable electronic gadgets or systems are required in our day to day life with high performance and low energy. The subtractor is the most crucial part in the arithmetic operations and also used in the data processing applications. Systems with clocks produces lot of obligations like clock skew, jitter, high power, glitches and delay issues. Hence, systems with asynchronous approaches are having highest demand over clocked architectures. Null Convention Logic (NCL) is the better clock less design approach and it is further improved as Multi Threshold Null Convention Logic (MTNCL). This paper presents the design of RBS cell with MTNCL and its performance is compared with proposed design using Multi Threshold Dual Rail Dual Spacer Delay Insensitive Logic(MTD
³
L). The existing and proposed methodologies are designed and verified using mentor graphics EDA tools.