Key note: Integrated design-for-reliability for ICs

This paper reviews historical development of on-chip electrostatic discharging (ESD) protection designs for ICs. ESD failure is the biggest reliability challenge to ICs. On-chip ESD protection is the core for integrated design-for-reliability (iDfR), which is required for the advanced ICs and microsystems. This review discusses the past, current and future of on-chip ESD protection designs.