A 48V:2V flying capacitor multilevel converter using current-limit control for flying capacitor balance

This work explores the well-known challenge of achieving voltage balance of capacitors in arbitrary (N-level) flying capacitor multilevel (FCML) converters. In particular, we explore the relationships among measurable circuit waveforms and flying capacitor voltage `states'. These are used to derive a set of sufficient conditions that ensure balance of the median capacitor voltage levels. It is shown that various forms of current-limit control (e.g. traditional peak or valley current-mode control, or low-frequency sampled regulation of peak of valley current levels), combined with modest additional criteria, will guarantee voltage balance. The concept is highlighted with a 7-level FCML converter operating with a 48 V supply, a 2 V output, and up to 10 A load current. The converter uses a GaN powertrain to achieve a compact layout and low parasitics. A digital control algorithm is used to regulate valley currents and the converter output voltage. Valley current detection and nested low-frequency feedback regulation is highlighted in the experimental prototype.