Efficient Verification Against Undesired Operating Points for MOS Analog Circuits

Identifying and removing undesired operating points is one of the most important problems in analog circuit design. In this paper, a divide and contraction verification method against undesired operating points in analog circuits is proposed. Unlike traditional methods to find all operating points, this method only targets searching voltage intervals containing undesired operating points. To achieve this, a systematic approach for automatically identifying all positive and negative feedback loops in circuits is introduced. A positive feedback loop breaking method and selection of breaking nodes are discussed to determine whether a monotonic return function can be obtained. Depending on the monotonicity of the return function, two types of divide and contraction algorithms are proposed to efficiently search voltage intervals containing operating points. Simulation results show that this method is effective and efficient in identifying the presence/absence of undesired operating points in a set of commonly used benchmark circuits.