Adaptive-learning neuron integrated circuits using metal-ferroelectric (SrBi/sub 2/Ta/sub 2/O/sub 9/)-semiconductor (MFS) FET's

An adaptive-learning neuron circuit was fabricated for the first time by integrating a metal-ferroelectric-semiconductor (MFS) FET and a complementary unijunction transistor (CUJT) on a silicon-on-insulator (SOI) structure. SrBi/sub 2/Ta/sub 2/O/sub 9/ (SBT) was selected as a ferroelectric gate material and it was deposited by liquid source misted chemical deposition (LSMCD) method. In fabrication of the circuit, a new selective etchant, NH/sub 4/F:HCl, was used to remove the unnecessary SBT film, since it was found from preliminary experiments that the parasitic ferroelectric capacitors prevented normal operation of the circuit. It was found that the drain current of the MFSFET was changed gradually by applying a number of input pulses with a sufficiently short duration time of 20 ns. The gradual change in the output pulse frequency of the neuron circuit was also demonstrated as the number of input pulses was increased.