Mixed signal verification to avoid integration mismatch in complex SoCs

The currently IC technology has led to complex circuits composed of digital, analog and mixed signal (AMS), and radiofrequency (RF) parts, requiring the correct matching between the different parts from these domains; otherwise it may alter the function or even cause the failure of the system during its operation. The traditional verification processes where digital and analog blocks are performed separately has not being able to cope with the high interaction between digital and analog blocks present in current systems. Although very scarce, some works on techniques for testbenches of mixed-signal have appeared in this area. Techniques for the verification of communication systems, with both analog and digital parts have been reported, but with transmitter and receiver treated in separate. The verification process is difficult due to the high complexity of the signals coming out from the analog blocks, especially the transmitter output, since this signal pass through several blocks in order to complete the modulation and the evaluation. Also difficult is the data generation, representing modulated signals, to stimulate the analog receiver. With the objective to avoid these problems, along with the few published works in the technical literature on mixed-signal verification methodologies, in this paper we propose a complete methodology for the verification of a category of communication SoCs, containing digital, analog and RF blocks, and for which the analog ends of the transmitter and receiver can be linked through a channel. The methodology consists of two parts: first, a bottom-up hierarchical approach to verify all the analog and digital blocks, and the interfaces as well and, secondly, to validate the description of the circuit top-level implementation model, which integrates both transmission and reception circuits along with a transmission medium model-this part is applicable to communication systems composed of transmitter and receiver.