5.10 A 1A LDO regulator driven by a 0.0013mm2 Class-D controller

A low-dropout (LDO) regulator generates a DC supply for electronic systems. Today's high-throughput wireless system-on-chips (SOCs) require large dynamic range of supply current, which demands a high current capacity LDO. The power transistor of the LDO scales up with the maximum load current. A conventional analog LDO consumes high quiescent current to drive the large power transistor for loop stability [2]. For a digital LDO, the control circuits increase with the size of the power transistor, which results in more area overhead and design complexity [4]. A Class-D driven LDO with a distributed-gate-resistance power transistor is proposed to achieve low quiescent current, low output ripple and small silicon area at the same time. This paper presents a 1.8V-to-1.2V input, 1.05V-output LDO with 1A load capacity.