Design of a Hummingbird Crypto Core implementing BIST technique

In recent years, lightweight cryptography which focuses on designing new cryptographic primitives with small hardware footprint and with low average and peak power consumption, has received a lot of attention. Hummingbird, an ultra-lightweight cryptographic algorithm has been developed both with lightweight software and lightweight hardware implementations keeping resource-constrained devices in mind. In this paper, we describe FPGA implementation with both software simulation as well as HW implementation of Hummingbird algorithm on Altera Platform. Moreover, testability of a complex chip is of prime concern now a days. Built-In-Self-Test (BIST) is a widely accepted approach for this purpose. In this paper design of a Hummingbird Crypto Core implementing BIST technique is proposed and both software and hardware implementation is performed. Here LFSR is used as pseudorandom test pattern generator and Signature Analysis is used as a Data Compression Technique. The proposed Crypto Core is simulated in Quartus II simulation software for the Altera Cyclone II family device as well as hardware implementation done in Altera DE2 board and performance is analyzed and compared with the other research works on Hummingbird implementation.