A decoupled scheduled dataflow multithreaded architecture

Proposes a new approach to building multithreaded uniprocessors that become building blocks in high-end computing architectures. Our innovativeness stems from a multithreaded architecture with non-blocking threads where all memory accesses are decoupled from the thread execution. Data is pre-loaded into the thread context (registers), and all results are post-stored after the completion of the thread execution. The decoupling of memory accesses from thread execution requires a separate unit to perform the necessary pre-loads and post-stores, and to control the allocation of hardware thread contexts to enabled threads. This separation facilitates achieving high locality and minimizing the impact of distribution and hierarchy in large memory systems. The non-blocking nature of threads eliminates the need for thread switching, thus improving the overhead in scheduling threads. The functional execution paradigm eliminates complex hardware required for scheduling instructions for modern superscalar architectures. We present preliminary results obtained from Monte Carlo simulations of the proposed architectural features.