Aging-aware adaptive voltage scaling of product blocks in 28nm nodes

This work provides elements to highlight the fundamental elements towards an Aging-aware Adaptive Voltage Scaling (A-AVS) scheme of digital circuits. Through main milestones including monitors' definition and insertion flow, monitors' characterization (mean and spread), the A-AVS scheme is assessed on real product blocks in 28nm High-K nodes. This study offers new perspectives towards the trade-off between product hardening and energy efficiency with respect to aging-induced slow-down, especially in context where Adaptive Voltage Scaling (AVS) is used to compensate for process centerings.