A Simple and Reliable System to Detect and Correct Setup/Hold Time Violations in Digital Circuits

In this article, a fully digital system to detect and correct setup/hold time violations in digital circuits, is presented. The proposed system benefits from simple, low-power, small-area, and easy-to-modify design. The system is composed of two separate blocks, detector and corrector connected through a 2-bit control signal. The detector is placed near flip-flops or memory elements and sends control signals to the corrector. Corrector circuitry consists of only CMOS inverters and a multiplexer, either after global clock source to correct clock globally or before the elements to correct them locally. Because of its simplicity, this system can be repeatedly used throughout the chip. Also it is proved that the correction circuitry may be realized by employing only a few CMOS inverters without any need for adjusting the delay of the inverters. Furthermore, mathematical proof for the ability of the inverter-based correction circuitry is provided. The system continuously monitors and corrects any setup/hold time violations up to the highest possible operating frequency a given process allows.