VLSI circuit reliability under AC hot-carrier stress

The hot-carrier problems are one of the most serious obstacles in making high-density, high-speed VLSI with sub micron geometry. Consequently, the MOSFET device level degradation under DC and AC stress has been investigated intensively in the past few years. However, little work has been carried out on the circuit level
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. This paper deals with two new aspects of the circuit behaviors under AC hot-carrier stress.