A better understanding of substrate enhanced gate current in VLSI MOSFET's and flash cells. I. Phenomenological aspects

This paper analyzes in depth the phenomenon of gate current enhancement upon application of a substrate voltage (|V/sub B/|) recently observed in deep submicron MOSFETs. The correlation between the gate (I/sub G/) and the substrate (I/sub B/) current is studied as a function of |V/sub B/|, and it is shown: (1) to provide an experimental signature of the onset of a new injection regime; and (2) to suggest a simple technique for separating the substrate enhanced gate current component from the conventional channel hot electron one. An empirical model of the new injection regime is assessed and the dependence of the model parameter on the lateral and vertical field is demonstrated. The sensitivity of the enhanced gate current to device design issues is also characterized. Different charge injection mechanisms compatible with the highlighted correlation between I/sub G/ and I/sub B/ are carefully analyzed in Part II.