A Fast and Power-Efficient Memory-Centric Architecture for Affine Computation

Affine computation is an important part in many vision applications. It is characterized by intensive computation and dependence of cascade memory access. This brief first implements operation fusion based on the data patterns to break the cascade dependence of memory access, and perform memory partitioning for memory-centric optimization to enhance data throughput and data reuse. Then, based on the memory-centric optimization, this brief proposes an affine computation architecture, using specialized pipeline design, which greatly improves computing efficiency. Experiments show that this work achieves higher performance on computing speed and power efficiency when compared with state-of-the-art methods.