A throughput-agnostic 11.9–13.6GOPS/mW multi-signal classification SoC for cognitive radios in 40nm CMOS

A blind classification SoC for cognitive radios, featuring multi-signal channelization, 16-core dynamic parallelism-frequency scaling and GALS-based multithreading, is realized in 40nm CMOS. Targeting ≥95% detection probability and < 0.5% false-alarm rate, the SoC achieves a throughput-insensitive energy efficiency of 11.9–13.6GOPS/mW for multiple 7.8–125MHz bandwidth-agnostic signals in a 500MHz channel. The SoC shows 2.1× lower energy, >2.7× less efficiency variation, 1.2× baseband area and up to 4× processing time reduction compared to prior work. Throughput-matched scheduling of spatial resources enables operation at peak energy efficiency without the need for any voltage adjustment.