High-speed multi-block-row layered decoding for Quasi-cyclic LDPC codes

Quasi-cyclic low-density parity-check (QC-LDPC) codes are used in numerous digital communication and storage systems. Layered LDPC decoding converges faster. To further increase the throughput, multiple block rows of the QC parity check matrix can be included in a layer. However, the maximum achievable clock frequency of the prior multi-block-row layered decoder is limited by the long critical path. This paper reformulates the involved equations so that the updating of the messages belonging to different block rows in a layer does not depend on any common intrinsic message. This enables the removal of one adder and one routing network from the critical path. As a result, the proposed design can reach substantially higher clock frequency than prior design, and achieves effective throughput-area tradeoff.