Integrated RF transformer and power combiner design in 150nm CMOS process

An integrated passive power combiner is discussed and characterized based on test structure fabricated in a 150 nm LFoundry CMOS process. The power combiner uses differentially driven coupled transformers as a basic building block. We discuss first the constraint driven sythesis of the transformer itself and the device modeling with a rapid RLCk model extractor. Helic's electronic design automation (EDA) tools are used for both, synthesis and extraction of the passive devices. The accuracy of the extracted transformer model is proven by comparison to an EM tool. The fabricated power combiner structure is finally extracted with the same EDA toolset and compared to measured data from on-wafer experiments. Good agreement is achieved in all cases proving the accuracy of the proposed synthesis and extraction methodology for complex RF IC designs.