Exploring technology solution paths for expaned 3D devices, interconnects and system integrations beyond TSV

Summary form only given. As key front-end, middle-end and backend module process enablers are approaching or achieve maturity, TSV technology has been successfully implemented onto certain advanced commercial IC products. Intensive effort is being made currently to explore further deployment of TSV-based 3D interconnect solutions for various advancing SOC and SiP offerings. Among various well demonstrated architectures, only a few are taken as both cost and performance justifiable solutions for practical implementation into commercial products. TSV-based 2.5D SiP for high performance FPGA and TSV-based stacked memory IC are well recognized ones of this kind. While the product realization of TSV wide I/O is delayed further from previous high expectation in the industry, other TSV-based active interposer architectures are demonstrated technically and economically viable, surprisingly forseen to enter commercial deployment even before TSV wide I/O. A low density but embedded TSV technology, illustrated in the paper, is proven as a cost-effective and technically viable solution for a wide range of ultra thin SiPs of MEMS-based smart sensor products. In parallel to applying TSV as the system integration solution for cross-chip interconnects, extrapolating the core concepts of 3D silicon re-construction is fanning out to a broader range of equally exciting technological innovations and products, such as 3D NAND and DRAM. Again, 3D IC is not just simply employing TSV as the alternative interconnect solution, rather a broad spectrum of innovative re-constructions of silicon devices, interconnects and system integrations in one or multiple combinations beyond conventional 2D integrated circuits design and fabrication methodology. There lies great potential and excitement for new devices, IC products and system packages with both performance and cost benefits, to design, develop and commercialize in coming years as illustrated in the paper. A systematic approach to exploring and deploying the core concepts of 3D IC beyond TSV is concluded and proposed.