An isolated-open pattern to de-embed pad parasitics [CMOSFETs]

To meet radio frequency (RF) performance required in large market of wireless applications, CMOS transistors having a small unit gate width are preferred. To correctly estimate RF performance, parasitics of the on-wafer pads and interconnection metal lines should be de-embedded as in the advanced bipolar transistors. However, cutoff frequencies of small-size MOSFETs de-embedded by the conventional on-wafer dummy structures result in large overestimation. A new open pattern is proposed to solve the problem. The meaning and justification of the new de-embedding pattern are discussed.