Electrical Characterization of Gate Traps in FETs With Ge and III–V Channels

Many Ge and III–V-based MOSFETs, as well as GaN-based MOS-HEMTs, are significantly compromised in performance and reliability by their high densities of interface, border, and oxide traps. Problems may also arise when characterizing traps in FETs made on high-mobility channels due to their device structures and material properties that are different from their conventional counterparts. In this paper, we present the results of our study of these traps as obtained by the use of several electrical characterization techniques. In particular, we will discuss the ac transconductance technique that we have recently proposed, which enables us to probe interface traps in the band gap and border and bulk traps in the gate dielectrics even without a body contact. We will also show that the inelastic electron tunneling spectroscopy offers the unique possibility to use electrical characterization to understand chemical origins of traps without using additional physical characterization techniques. Ionizing radiation-induced trapping of charges in MOSFETs and MOS-HEMTs made on III–V semiconductors is also reported and discussed.