An implementation of DPD in FPGA with a soft proceesor using partial re-configuration for wireless radios

The nonlinearity of a Power amplifier creates spectral growth beyond a specific bandwidth which interferes with adjacent channels. This nonlinearity also causes in-band distortion which will affect the Bit error rate performance, so Linearization of power amplifiers is very essential for reliable transmission. Digital Pre-distortion (DPD) is a linearization technique which will negate the non-linear effects of the power amplifier generated while third generation wide-band waveforms like Wimax, LTE, WCDMA and Tetra are used. This paper discusses the implementation of DPD in FPGA using Partial reconfiguration with Microblaze processor. The configuration of the DPD module will change depending upon the waveform. In the current scenario the waveform designer has to design different DPD modules depending upon the waveform and integrate with a specific waveform and has to load the entire FPGA whenever the waveform changes. Here a new approach is employed so that the entire DPD design is split into Static part and a Dynamic Part. The static part contains the design which will not change with respect to change in the waveform, which includes a soft processor also. The Dynamic part contains the design which will change with the change in the waveform, so that the user has to load only the dynamic part which will be very small when compared with the full bit file. A soft processor called Microblaze is used to implement some critical portion of the algorithm for efficient implementation.