A broadband frontend design for UHF RFID tag

This paper presents a complete broadband UHF RFID tag frontend operating in 840/960-MHz band. First a complete RFID system is modeled with Verilog-A. With the optimal quality factor of frontend derived from the system modeling part, a broadband charge pumps (CP) are designed with 0.16um CMOS process. The proposed broadband CP achieves a power conversion efficiency (PCE) of 39.6% at −21.1dBm input RF power. In addition, a broadband commercial use UHF RFID antenna is presented to match the broadband CP. Finally, the co-simulation is performed for the complete frontend design. The simulation result shows that the proposed UHF RFID tag frontend achieves an minimum sensitivity of −21dBm and an maximal power bandwidth larger than 250MHz.