Solid state: 100 000+ gates on a chip: Mastering the minutia: The submicron geometries needed for VLSI have put IC makers on a new learning curve; object, to perfect feature delineation techniques

Semiconductor manufacturers are within sight of sub-micron feature sizes in their quest for ever more device density. Solid evidence of this fact can be found in the 64-kbit dynamic random access memory and 16-bit microcomputer already on the market. This two-part report describes first how fabrication techniques and production methods have changed to allow increased chip complexity. Next it outlines the tasks remaining to be done before 100 000 gates per chip, or more, become commonplace.