Considerations in choosing a microprogramable bit-sliced architecture

The currently available microprocessors can be grouped into three classes based on functional partitioning: (1) the multichip family, consisting of compatible CPU, memory, and I/O devices; (2) the single-chip CPU, designed for standard product memory and I/O devices; and (3) the multichip microprogrammable CPU, designed for standard product memory and I/O devices. The limitations and advantages of the first two categories are well understood, since products in this class have been available for over two years and have been the subject of an avalanche of microprocessor articles. The third category, however, has been available for less than a year, and until recently has only been available as a manufacturer-defined processor system (National Semiconductor's IMP series of microprocessors). However, the manufacturer-defined processor, while providing a desirable starting point for most users, has tended to obscure some of the design flexibility of the basic chip set. The decision by National Semiconductor to provide full support for development of custom configurations of its chip set, plus the fact that designs of architecturally similar chip sets have been carried out by several other semiconductor manufacturers (including AMI, Monolithic Memories, and Raytheon) warrants a review of the unique advantages and potential pitfalls of this architecture.