High aspect ratio TSVs in micropin-fin heat sinks for 3D ICs

Future high performance 3D systems require a systematic co-design of their electrical interconnect network and their heat removal mechanism. This paper presents fine pitch (35 μm) and high aspect ratio (20:1) TSVs integrated in a benchmarked micropin-fin heat sink capable of removing power density of 100 W/cm
²
/tier at a junction temperature below 50 °C.