TSV process solution for 3D-IC

Through-silicon-via (TSV) process of which process temperature is less than 180 degree C (°C) has been accomplished by using ZrBO dielectric film and WN barrier film. Integration of ZrBO and WN, both being Carbon free, capable to deposit at low temperature and showing high barrier performance, would result in high reliability in Cu interconnect. The diameter of 5μm (Φ5μm) TSV was formed by anisotropie etching with non-Bosch process, which we call “scallop-free”, and the aspect ratio was about 10 (AR10). The sidewall roughness is below 15nm.